GL-X3000(Spitz AX) disassembling/board diagram/UART pins

What recovery methods are possible?

i can confirm, that mtk_uartboot is working with the right timing (starting pgm / powering on):

mtk_uartboot.exe -s COM7 -a -p bl2-mt7981-bga-ddr4-ram.bin -f openwrt-mediatek-filogic-glinet_gl-x3000-bl31-uboot.fip && putty.exe -serial COM7 -sercfg 115200,8,n,1,N
mtk_uartboot - 0.1.1
Using serial port: COM7
Handshake...
hw code: 0x7981
hw sub code: 0x8a00
hw ver: 0xca00
sw ver: 0x1
Baud rate set to 460800
sending payload to 0x201000...
Checksum: 0x6f0e
Setting baudrate back to 115200
Jumping to 0x201000 in aarch64...
Waiting for BL2. Message below:
==================================
NOTICE:  BL2: v2.10.0   (release):v2.10.0-mtk
NOTICE:  BL2: Built : 13:17:08, Mar  1 2024
NOTICE:  WDT: Cold boot
NOTICE:  WDT: disabled
NOTICE:  EMI: Using DDR4 settings
NOTICE:  EMI: Detected DRAM size: 512MB
NOTICE:  EMI: complex R/W mem test passed
NOTICE:  CPU: MT7981 (1300MHz)
NOTICE:  Starting UART download handshake ...
==================================
BL2 UART DL version: 0x10
Baudrate set to: 921600
FIP sent.
==================================
NOTICE:  Received FIP 0x817b1 @ 0x40400000 ...
==================================

it was not possible to flash gl inet stock uboot directly. I did it this way once system booted:

echo 0 >/sys/block/mmcblk0boot0/force_ro
dd if=X3000_uboot_fip.bin of=/dev/mmcblk0p4
dd if=X3000_bl2.img of=/dev/mmcblk0boot0

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